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« < November 2019 > »
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Research Lines
Title Partner  Leader
Activity 1 Out-of-order commit without checkpointing UPV Julio Sahuquillo
Activity 2

Extracting automatic task level parallelism

UPV Julio Sahuquillo
Activity 3

Memory organization without caches for data storage

UPV Julio Sahuquillo
Activity 4 True zero-copy communication protocol and associated hardware and software interfaces. UPV Jose Duato
Activity 5 Cell BE Processor (Cell BE from now on) UM Juan Fernández 
Activity 6 Efficient data acquisition and processing by using a wireless sensor network UCLM Rafael Casado
Activity 7 Heterogeneous Video Transcoding UCLM Pedro Cuenca
Task 1 (UPV) Improving interconnection network performance UPV  
subTask 1.1 Choosing the best topology UPV Pedro Lopez
subTask 1.2

Development of deadlock-free routing strategies

UPV José Flich
subTask 1.3 Development of congestion management techniques UPV Antonio Robles
subTask 1.4 Development of efficient fault tolerant routing techniques UPV Antonio Robles
subTask 1.5 High-radix switch architectures UPV José Flich
subTask 1.6 Techniques for reducing energy consumption in interconnection networks UPV Vicente Santonja
subTask 1.7 Efficient cache coherence protocols UPV Antonio Robles
Task 2 (UPV) Improving interconnection network on chip (NoCs) performance UPV  
subTask 2.1 Analysis of on-chip interconnection network topologies UPV M. Engracia Gomez
subTask 2.2 New switch architectures for NoCs UPV José Flich
subTask 2.3 Design of a new fault-tolerant communication model for on-chip networks UPV Federico Silla
subTask 2.4 A new switching strategy design (Virtual Virtual Channels) UPV M. Engracia Gomez
subTask 2.5

Techniques for routing and power saving in NoCs




José Flich
subTask 2.6 Communication-aware topological mapping technique for NoCs



Juan Manuel Orduña 
Task  3 (UPV)

Improving microprocessor performance

UPV Julio Sahuquillo
Task  4 (UPV)

Processor architectures for embedded real time systems

UPV Julio Sahuquillo
Task 1 (UCLM) Improving the quality of service (QoS) provided by the interconnection network to the applications UCLM José Luis Sánchez
Task 2 (UCLM) Development of efficient mechanisms to reconfigure high performance interconnection networks UCLM Rafael Casado
Task 3 (UCLM) Equipment of a Grid system with the capability of providing Quality of Service UCLM Carmen Carrión
Task 4 (UCLM) Improved performance of the multimedia communications over Broadband Wireless Access networks UCLM Francisco Delicado 
Task 5 (UCLM) Optimization of the operation of wireless sensor networks UCLM Luis Orozco
Task 1 (UM) Improving the performance of the cluster nodes: CMPs UM
subTask 1.1 Internal organization of the GPU UM José Manuel García
subTask 1.2 Memory hierarchy and cache coherence in CMP architectures UM Manuel Acacio
subTask 1.3 Energy-efficiency in processor cores, memory and interconnection network  UM Juan L. Aragón
subTask 1.4 Fault-tolerance in CMP architectures UM José Manuel García
subTask 1.5 Multimedia applications UM Gregorio Bernabé
subTask 1.6 Application development on CMPs UM José Manuel García Carrasco
Task 2 (UM) Distributed software enhancement in PC clusters UM


subTask 2.1 Design and implementation of efficient mechanisms for data transfer and storage in distributed systems  UM Juan Piernas/
Juan Fernandez
subTask 2.2 Building a middleware infrastructure for the development of distributed applications over high-performance networks  UM Diego Sevilla
subTask 2.3 Development of location aware services for WLAN users  UM Oscar Cánovas
subTask 2.4 Design of a security policy management system for GT4  UM Felix J. García
Task 3 (UM) Artificial perception algorithms for advanced architectures  UM

Pedro López de Teruel

Task 1 (UVEG) Performance improvements of Distributed Virtual Environments (DVE) UVEG

Juan Manuel Orduña

Task 2 (UVEG) Development of a scalable multi-agent architecture for crowd simulation UVEG Juan Manuel Orduña