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subTask 1.1 (UPV): Choosing the best topology

Leader: Pedro Lopez; Researchers: Roberto Peñaranda, María Engracia Gómez, Crispín Gómez

1. Brief Description of the Goals

The topology of the interconnection network is a key design issue for performance and cost.

Direct topologies are sometimes used since they provide a reduced hardware cost, but they are not the most suitable ones for large machines since the number of dimensions is limited by our 3-D physical space, thus increasing the communication latency and reducing network throughput. 

On the other hand, indirect topologies are more appropriate for large machines since they provide better performance, but this is achieved at the expense of using a high amount of switches and links. 

In this task, we look for extensions of traditional topologies or hybrid ones that combines the best features from both direct and indirect topologies to efficiently connect an extremely high number of nodes. 

2. Scientific and Technical Developed Activities

We analyzed how the routing algorithm affects the complexity of the switch, and considering this, we have proposed and analyzed some extensions of the fat–tree topology to take advantage of the available hardware resources. We analyzed not only the impact on performance of these extensions but also their influence over switch complexity, analyzing its cost. In particular, we proposed two extensions of the RUFT topology based on i) using two parallel links to connect switches and ii) using a single link with double width. Despite these topologies have a lower switch complexity than fat-trees, they are able to improve its performance. The results were published by Bermúdez et al. in Euro-Par 2012 Conference.

On the other hand, we have proposed a n-dimensional topology where the nodes of each dimension are connected through a small indirect topology. This combination results in a family of topologies that provides high performance, with latency and throughput figures of merit close to indirect topologies, but with a lower hardware cost. In particular, the new family is able to double the throughput obtained per switching element compared to indirect topologies, and this difference is even higher for direct topologies. A paper describing the new topology was published by Peñaranda et al. in NCA 2012 Conference. 

Publications: Bermudez12 Peñaranda12

Projects funded by Public Calls: TIN2006-15516-C04-01,  TIN2009-14475-C04-01

External collaborations Academia: --

External collaborations Industry: --

Company Agreements: --

PhD dissertations: --

Patents: Una familia de topologías híbridas de red de interconexión para supercomputadores, centros de proceso de datos, servidores, y redes dentro del chip