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Task 1 (UCLM): Improving the quality of service (QoS) provided by the interconnection network to

Leader: José Luis Sánchez; Researchers: Francisco José Alfaro, Pedro Javier García, Francisco José Quiles, Juan Antonio Villar, Francisco Triviño, Jesús Escudero

Removal subTask 1.1 (UCLM): Improving quality of service by using virtual servers

Reason: This subTask has been incorporated into the subTask 1.2 from UCLM, being more relevant for the development of the project.

subTask 1.1 Improving quality of service by using virtual servers

subTask 1.2 Improving quality of service by using the interconnection network hardware support

subTask 1.3 Reducing hardware support complexity for providing quality of service

subTask 1.4 Quality of service provisioning in CMPs

subTask 1.5 Development of integrated techniques for QoS provision and congestion management

1. Brief Description of the Goals

Current high-performance interconnection networks must contribute to provide applications with Quality of Service (QoS), and consequently current interconnect standards provide hardware support for that. Several QoS techniques have been proposed for the classical interconnects domain. In many cases, the proposals consist in devoting a different virtual channel (VC) to each traffic class. This way increases switch complexity and also prevents the use of these VCs for other purposes. Moreover, those proposals are not directly transferable to new interconnect scenarios like Networks on Chip (NoCs) due to new design constraints regarding power dissipation, energy consumption, and silicon area. On the other hand, proposed techniques for QoS support and those proposed for congestion management share the main aim of improving network performance in any scenario, and in many cases, they also share the basic approach for achieving this primary objective.

This research line focuses on developing new strategies and techniques for QoS provision, able to satisfy the applications requirements. Specifically, the main objectives are to optimize the use of the QoS support provided by current interconnect standards, to reduce the implementation cost of switches with QoS support and to propose techniques able to support both QoS and congestion management by means of a unique set of resources.

2. Scientific and Technical Developed Activities

We have proposed how to configure InfiniBand (IBA) and Advanced Switching (AS) existing mechanisms to provide applications with QoS. In the IBA case, we have formalized a methodology to provide QoS in InfiniBand subnetworks. All the details of this methodology were published by Alfaro et al. in IEEE Transactions on Computers, vol. 56, issue 8, 2007 and in Journal of Parallel and Distributed Computing. vol. 69, issue 6, 2009.

With respect to AS, we have proposed a general framework for providing QoS over this kind of networks. The framework description and the main results were published by Martínez et al. in Journal of Systems Architecture, vol. 53, issue 7, 2007, in IEEE Transactions on Parallel and Distributed Systems, vol.19, issue 8, 2008, in IEEE Transactions Parallel and Distributed Systems, vol. 21, issue 3, 2010, and in Journal of Parallel and Distributed Computing, vol. 72, issue 8, 2012. 

In the most general case, we have proposed a new cost-effective switch architecture with QoS support for high-speed interconnection networks. The switch architecture and performance results were published by Martínez et al. in IEEE Transactions on Parallel and Distributed Systems, vol.18, issue 12, 2007 and in IEEE Transactions on Computers, vol. 57, issue 7, 2008.

Additionally, we have proposed an integrated, cost-effective solution for providing both QoS and congestion management in high-speed interconnection networks. This alternative was published by Martínez et al. in IEEE Transactions on Parallel and Distributed Systems, vol. 20, issue 1, 2009. 

Finally, in order to provide QoS in CMPs, and focused on the on-chip-network, we have proposed and evaluated virtualization techniques, static and dynamic reconfiguration mechanisms, and fault tolerance support. Virtualization techniques were published by Triviño et al. in Microprocessors & Microsystems journal, vol. 35, issue 2, 2011, and Journal of Systems Architecture, vol. 58, 2012. Configuration and reconfiguration mechanisms were published by Triviño et al. in proceedings of HiPC and SAMOS conferences in 2011 and 2012, respectively. All this work composed the Phd of F. Triviño.


Publications: [RMartinez06a], [RMartinez06b], [Alfaro07], [AMartinez07a], [AMartinez07b], [AMartinez07c], [AMartinez07d], [AMartinez07e], [AMartinez07f], [Martinez07], [RMartinez07], [Villar07], [AMartinez08 ], [RMartinez08 ], [Alfaro09 ], [AMartinez09 ], [RMartinez09 ] and [Villar09 ]

Projects funded by Public Calls: CA501] by european grant, TSI-020400-2009-64  by national grant and PBC05-005, PREG05-025, PCC08-0078 by regional grants.

External collaborations Academia: --

External collaborations Industry: --

Company Agreements: --

PhD dissertations: Juan Antonio Villar Ortiz

Patents: --